/*
utf-8
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此程序为电子钟顶层程序
------------------------------------------------
由刘丙旭出品
遵循署名-非商业性使用-相同方式共享 4.0 国际协议 (CC BY-NC-SA 4.0)
详情访问https://creativecommons.org/licenses/by-nc-sa/4.0/deed.zh
------------------------------------------------
*/
`timescale 1ns/1ns

module clock_top(
input RESET,              //重置时钟为0
input MODE,                //更改模式
input SETBIT,              //更改校时位置
input SET,                //校时按键，按下一次加一
input clk,                //50MHz时钟输入
output cHH,                //时高位
output cHL,                //时低位
output cMH,                //分高位
output cML,                //分低位
output cSH,                //秒高位
output cSL,                //秒低位
output a,b,c,d,e,f,g,dp,  //七段数码管对应管脚
output wire [3:0] LED,
output buzzer
);

  //wire a,b,c,d,e,f,g,dp;
  wire [3:0] dHH,dHL,dMH,dML,dSH,dSL;
  wire [3:0] clk_HH,clk_HL,clk_MH,clk_ML,clk_SH,clk_SL;
  
  wire [3:0] ac_HH_out,ac_HL_out,ac_MH_out,ac_ML_out;
  wire [3:0] ac_on_off_l,ac_on_off_r;
  
  wire [2:0] MODE_sel,SETBIT_sel,SET_sel,RESET_sel;
  //wire [3:0] LED;
  wire [1:0] count;
  
  wire [5:0] dp_in;
  wire [5:0] clk_dp;
  wire [5:0] ac_dp;
  //时钟计时模块
  clock_clock clock(
  .RESET       (RESET_sel[1]  ),        //重置时钟为0
  .MODE        (MODE_sel[1]  ),          //更改模式
  .SETBIT      (SETBIT_sel[1]),        //更改校时位置
  .SET         (SET_sel[1]    ),          //校时按键，按下一次加一
  .clk         (clk),              //50MHz时钟输入
  .HH          (clk_HH),             //时高位BCD
  .HL          (clk_HL),             //时低位BCD
  .MH          (clk_MH),            //分高位BCD
  .ML          (clk_ML),            //分低位BCD
  .SH          (clk_SH),            //秒高位BCD
  .SL          (clk_SL),            //秒低位BCD
  .dp_in       (clk_dp)            //小数点
  );
  
  clock_alarmclock alarmclock(
  .HH               (clk_HH),
  .HL               (clk_HL),
  .MH               (clk_MH),
  .ML               (clk_ML),
  .clk              (clk),
  .RESET            (RESET_sel[0]  ),
  .MODE             (MODE_sel[0]  ),
  .SETBIT           (SETBIT_sel[0]),
  .SET              (SET_sel[0]    ),
  .en               (MODE_sel[1]&MODE_sel[0]),
  
  .ac_HH_out        (ac_HH_out  ),
  .ac_HL_out        (ac_HL_out  ),
  .ac_MH_out        (ac_MH_out  ),
  .ac_ML_out        (ac_ML_out  ),
  .ac_on_off_l      (ac_on_off_l),
  .ac_on_off_r      (ac_on_off_r),
  .dp               (ac_dp),
  .buzzer           (buzzer)
  );
  
  clock_sel sel(
  .MODE          (MODE),
  .SETBIT        (SETBIT),
  .SET           (SET),
  .RESET         (RESET),
  .clk           (clk),
  .MODE_sel      (MODE_sel  ),
  .SETBIT_sel    (SETBIT_sel),
  .SET_sel       (SET_sel   ),
  .RESET_sel     (RESET_sel ),
  .LED           (LED),
  .count         (count)
  );
  
  dis_del dis_del(
  .clk_HH           (clk_HH),
  .clk_HL           (clk_HL),
  .clk_MH           (clk_MH),
  .clk_ML           (clk_ML),
  .clk_SH           (clk_SH),
  .clk_SL           (clk_SL),
  .ac_HH_out        (ac_HH_out),
  .ac_HL_out        (ac_HL_out),
  .ac_MH_out        (ac_MH_out),
  .ac_ML_out        (ac_ML_out),
  .ac_on_off_l      (ac_on_off_l),
  .ac_on_off_r      (ac_on_off_r),
  .clk_dp           (clk_dp),
  .ac_dp            (ac_dp ),
  
  .sel              (count),
  
  .dHH              (dHH),
  .dHL              (dHL),
  .dMH              (dMH),
  .dML              (dML),
  .dSH              (dSH),
  .dSL              (dSL),
  .dp               (dp_in)
  );
  //调用六位数码管扫描显示模块
  display dis(
  .clk       (clk),
  .HH        (dHH),
  .HL        (dHL),
  .MH        (dMH),
  .ML        (dML),
  .SH        (dSH),
  .SL        (dSL),
  .dp_in     (dp_in),
  .a         (a),
  .b         (b),
  .c         (c),
  .d         (d),
  .e         (e),
  .f         (f),
  .g         (g),
  .dp        (dp),
  .conHH     (cHH),
  .conHL     (cHL),
  .conMH     (cMH),
  .conML     (cML),
  .conSH     (cSH),
  .conSL     (cSL)
  );
endmodule